A Multiprocessor DSP System Using PADDI-2 - Design Automation Conference, 1998. Proceedings
نویسندگان
چکیده
We have integrated an image processing system built around PADDI-2, a custom 48 node MIMD parallel DSP. The system includes image processing algorithms, a graphical SFG tool, a simulator, routing tools, compilers, hardware configuration and debugging tools, application development libraries, and software implementations for hardware verification. The system board, connected to a SPARCstation via a custom Sbus controller, contains 384 processors in 8 VLSI chips. The software environment supports a multiprocessor system under development (VGI1). The software tools and libraries are modular, with implementation dependencies isolated in layered encapsulations. CR Descriptors: B.7.1 [Integrated Circuits1:Types and Design Styles VLSI; C. 1.2 [Processor Architectures]:Multiple Data Stream Architectures Parallel processors; D. 1.3 [Programming Techniques]:Parallel Programming; 1.3.1 [Computer Graphics1:Hardware Architecture; 1.4.3 [Image Processing1:Enhancement.
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